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<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/STM32H7xx_HAL_Driver/Inc/stm32h7xx_hal_uart.h File Reference</title>
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  <div class="headertitle"><div class="title">stm32h7xx_hal_uart.h File Reference</div></div>
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<p>Header file of UART HAL module.  
<a href="#details">More...</a></p>
<div class="textblock"><code>#include &quot;<a class="el" href="stm32h7xx__hal__def_8h_source.html">stm32h7xx_hal_def.h</a>&quot;</code><br />
<code>#include &quot;<a class="el" href="stm32h7xx__hal__uart__ex_8h_source.html">stm32h7xx_hal_uart_ex.h</a>&quot;</code><br />
</div>
<p><a href="stm32h7xx__hal__uart_8h_source.html">Go to the source code of this file.</a></p>
<table class="memberdecls">
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Classes</h2></td></tr>
<tr class="memitem:UART_5FInitTypeDef" id="r_UART_5FInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_u_a_r_t___init_type_def.html">UART_InitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART Init Structure definition.  <a href="struct_u_a_r_t___init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:UART_5FAdvFeatureInitTypeDef" id="r_UART_5FAdvFeatureInitTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_u_a_r_t___adv_feature_init_type_def.html">UART_AdvFeatureInitTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART Advanced Features initialization structure definition.  <a href="struct_u_a_r_t___adv_feature_init_type_def.html#details">More...</a><br /></td></tr>
<tr class="memitem:_5F_5FUART_5FHandleTypeDef" id="r__5F_5FUART_5FHandleTypeDef"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_____u_a_r_t___handle_type_def.html">__UART_HandleTypeDef</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART handle Structure definition.  <a href="struct_____u_a_r_t___handle_type_def.html#details">More...</a><br /></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:gacd81aeb745b71fc1c121cc686369600d" id="r_gacd81aeb745b71fc1c121cc686369600d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___state___definition.html#gacd81aeb745b71fc1c121cc686369600d">HAL_UART_STATE_RESET</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga5f9ebc1c0e62dbad395ecf020e88bce9" id="r_ga5f9ebc1c0e62dbad395ecf020e88bce9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___state___definition.html#ga5f9ebc1c0e62dbad395ecf020e88bce9">HAL_UART_STATE_READY</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memitem:gabe7a46b4b59e60aa480bdf2aa4c2fd8e" id="r_gabe7a46b4b59e60aa480bdf2aa4c2fd8e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___state___definition.html#gabe7a46b4b59e60aa480bdf2aa4c2fd8e">HAL_UART_STATE_BUSY</a>&#160;&#160;&#160;0x00000024U</td></tr>
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<tr class="memitem:gacbe168f8945e38c90d622982ee1300aa" id="r_gacbe168f8945e38c90d622982ee1300aa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___state___definition.html#gacbe168f8945e38c90d622982ee1300aa">HAL_UART_STATE_ERROR</a>&#160;&#160;&#160;0x000000E0U</td></tr>
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<tr class="memitem:ga270dea6e1a92dd83fe58802450bdd60c" id="r_ga270dea6e1a92dd83fe58802450bdd60c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___parity.html#ga270dea6e1a92dd83fe58802450bdd60c">UART_PARITY_NONE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga063b14ac42ef9e8f4246c17a586b14eb" id="r_ga063b14ac42ef9e8f4246c17a586b14eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___parity.html#ga063b14ac42ef9e8f4246c17a586b14eb">UART_PARITY_EVEN</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga60f8fcf084f9a8514efafb617c70b074">USART_CR1_PCE</a></td></tr>
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<tr class="memitem:gae0569001c06b7760cd38c481f84116cf" id="r_gae0569001c06b7760cd38c481f84116cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___hardware___flow___control.html#gae0569001c06b7760cd38c481f84116cf">UART_HWCONTROL_NONE</a>&#160;&#160;&#160;0x00000000U</td></tr>
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<tr class="memitem:ga6cdc4e35cd90d15a964994499475e7d7" id="r_ga6cdc4e35cd90d15a964994499475e7d7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___mode.html#ga6cdc4e35cd90d15a964994499475e7d7">UART_MODE_RX</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gada0d5d407a22264de847bc1b40a17aeb">USART_CR1_RE</a></td></tr>
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<tr class="memitem:gab47c162935901e89322e2ce6700b6744" id="r_gab47c162935901e89322e2ce6700b6744"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___mode.html#gab47c162935901e89322e2ce6700b6744">UART_MODE_TX_RX</a>&#160;&#160;&#160;(<a class="el" href="group___peripheral___registers___bits___definition.html#gade7f090b04fd78b755b43357ecaa9622">USART_CR1_TE</a> |<a class="el" href="group___peripheral___registers___bits___definition.html#gada0d5d407a22264de847bc1b40a17aeb">USART_CR1_RE</a>)</td></tr>
<tr class="memitem:gaf32492459be708981ebc5615194cdae9" id="r_gaf32492459be708981ebc5615194cdae9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___state.html#gaf32492459be708981ebc5615194cdae9">UART_STATE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gab6b470dccef2a518a45554b171acff5b" id="r_gab6b470dccef2a518a45554b171acff5b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___state.html#gab6b470dccef2a518a45554b171acff5b">UART_STATE_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2bb650676aaae4a5203f372d497d5947">USART_CR1_UE</a></td></tr>
<tr class="memitem:gaa6a320ec65d248d76f21de818db1a2f0" id="r_gaa6a320ec65d248d76f21de818db1a2f0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___over___sampling.html#gaa6a320ec65d248d76f21de818db1a2f0">UART_OVERSAMPLING_16</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaeb13896e8bdc1bb041e01a86a868ee0b" id="r_gaeb13896e8bdc1bb041e01a86a868ee0b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___over___sampling.html#gaeb13896e8bdc1bb041e01a86a868ee0b">UART_OVERSAMPLING_8</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaed6caeb0cb48f1a7b34090f31a92a8e2">USART_CR1_OVER8</a></td></tr>
<tr class="memitem:gadfcb0e9db2719321048b249b2c5cc15f" id="r_gadfcb0e9db2719321048b249b2c5cc15f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___one_bit___sampling.html#gadfcb0e9db2719321048b249b2c5cc15f">UART_ONE_BIT_SAMPLE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gadcc0aed6e7a466da3c45363f69dcbfb6" id="r_gadcc0aed6e7a466da3c45363f69dcbfb6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___one_bit___sampling.html#gadcc0aed6e7a466da3c45363f69dcbfb6">UART_ONE_BIT_SAMPLE_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9a96fb1a7beab602cbc8cb0393593826">USART_CR3_ONEBIT</a></td></tr>
<tr class="memitem:ga7e210157853228d94668b5ee7233087d" id="r_ga7e210157853228d94668b5ee7233087d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#ga7e210157853228d94668b5ee7233087d">UART_PRESCALER_DIV1</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gace5f0cc2723defa6e1858d6dd7328146" id="r_gace5f0cc2723defa6e1858d6dd7328146"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#gace5f0cc2723defa6e1858d6dd7328146">UART_PRESCALER_DIV2</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memitem:gab908550eaada50e9abb57e27f2a1b32b" id="r_gab908550eaada50e9abb57e27f2a1b32b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#gab908550eaada50e9abb57e27f2a1b32b">UART_PRESCALER_DIV4</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memitem:ga39932cc9816584194aec27a1fe5069f4" id="r_ga39932cc9816584194aec27a1fe5069f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#ga39932cc9816584194aec27a1fe5069f4">UART_PRESCALER_DIV6</a>&#160;&#160;&#160;0x00000003U</td></tr>
<tr class="memitem:gaa8243381f97aa0b2c22d3d760c1828fb" id="r_gaa8243381f97aa0b2c22d3d760c1828fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#gaa8243381f97aa0b2c22d3d760c1828fb">UART_PRESCALER_DIV8</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memitem:ga1e3e467c48fcb55666761454a7412640" id="r_ga1e3e467c48fcb55666761454a7412640"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#ga1e3e467c48fcb55666761454a7412640">UART_PRESCALER_DIV10</a>&#160;&#160;&#160;0x00000005U</td></tr>
<tr class="memitem:gad256f52714b04a7559e8f9176322be92" id="r_gad256f52714b04a7559e8f9176322be92"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#gad256f52714b04a7559e8f9176322be92">UART_PRESCALER_DIV12</a>&#160;&#160;&#160;0x00000006U</td></tr>
<tr class="memitem:ga8332f7185809795e77bce091dfd3663c" id="r_ga8332f7185809795e77bce091dfd3663c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#ga8332f7185809795e77bce091dfd3663c">UART_PRESCALER_DIV16</a>&#160;&#160;&#160;0x00000007U</td></tr>
<tr class="memitem:gaad93948e7d021e2fe44dec073cafcea4" id="r_gaad93948e7d021e2fe44dec073cafcea4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#gaad93948e7d021e2fe44dec073cafcea4">UART_PRESCALER_DIV32</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memitem:gada8fd9635ead84946cf45aa4bf3f682e" id="r_gada8fd9635ead84946cf45aa4bf3f682e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#gada8fd9635ead84946cf45aa4bf3f682e">UART_PRESCALER_DIV64</a>&#160;&#160;&#160;0x00000009U</td></tr>
<tr class="memitem:gac111f3090e35143688710114e1e9be6d" id="r_gac111f3090e35143688710114e1e9be6d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#gac111f3090e35143688710114e1e9be6d">UART_PRESCALER_DIV128</a>&#160;&#160;&#160;0x0000000AU</td></tr>
<tr class="memitem:ga0d602ff1d466e94c5ebe85c2e9e36d11" id="r_ga0d602ff1d466e94c5ebe85c2e9e36d11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___clock_prescaler.html#ga0d602ff1d466e94c5ebe85c2e9e36d11">UART_PRESCALER_DIV256</a>&#160;&#160;&#160;0x0000000BU</td></tr>
<tr class="memitem:ga87bcd5d6ca1b354785788366c9c47606" id="r_ga87bcd5d6ca1b354785788366c9c47606"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___auto_baud___rate___mode.html#ga87bcd5d6ca1b354785788366c9c47606">UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga8ac0407640f138067bdcf2ad6cdc04cc" id="r_ga8ac0407640f138067bdcf2ad6cdc04cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___auto_baud___rate___mode.html#ga8ac0407640f138067bdcf2ad6cdc04cc">UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga74a9e3740bd087f5170c58b85bc4e689">USART_CR2_ABRMODE_0</a></td></tr>
<tr class="memitem:ga0bdbaec8f1186a4bbbdef5e09896a3e2" id="r_ga0bdbaec8f1186a4bbbdef5e09896a3e2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___auto_baud___rate___mode.html#ga0bdbaec8f1186a4bbbdef5e09896a3e2">UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac439d0281ee2e6f20261076a50314cff">USART_CR2_ABRMODE_1</a></td></tr>
<tr class="memitem:gaa325fa0ee642902e4746a53f9b58720d" id="r_gaa325fa0ee642902e4746a53f9b58720d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___auto_baud___rate___mode.html#gaa325fa0ee642902e4746a53f9b58720d">UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7b0a61926b32b1bbe136944c4133d2be">USART_CR2_ABRMODE</a></td></tr>
<tr class="memitem:ga575c43813df656b21dc39aff6a968046" id="r_ga575c43813df656b21dc39aff6a968046"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___receiver___timeout.html#ga575c43813df656b21dc39aff6a968046">UART_RECEIVER_TIMEOUT_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga6e25985f0dacc3e79ae552746952ac18" id="r_ga6e25985f0dacc3e79ae552746952ac18"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___receiver___timeout.html#ga6e25985f0dacc3e79ae552746952ac18">UART_RECEIVER_TIMEOUT_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gab89524eda63950f55bc47208a66b7dca">USART_CR2_RTOEN</a></td></tr>
<tr class="memitem:ga7bc4a2de3d6b29235188020628c4b30c" id="r_ga7bc4a2de3d6b29235188020628c4b30c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___l_i_n.html#ga7bc4a2de3d6b29235188020628c4b30c">UART_LIN_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaf3f2741d3af2737c51c3040e79fdc664" id="r_gaf3f2741d3af2737c51c3040e79fdc664"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___l_i_n.html#gaf3f2741d3af2737c51c3040e79fdc664">UART_LIN_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac8931efa62c29d92f5c0ec5a05f907ef">USART_CR2_LINEN</a></td></tr>
<tr class="memitem:ga027616b7a36b36e0e51ffee947533624" id="r_ga027616b7a36b36e0e51ffee947533624"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___l_i_n___break___detection.html#ga027616b7a36b36e0e51ffee947533624">UART_LINBREAKDETECTLENGTH_10B</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga2f66fcd37de7a3ca9e1101305f2e23e6" id="r_ga2f66fcd37de7a3ca9e1101305f2e23e6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___l_i_n___break___detection.html#ga2f66fcd37de7a3ca9e1101305f2e23e6">UART_LINBREAKDETECTLENGTH_11B</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7f9bc41700717fd93548e0e95b6072ed">USART_CR2_LBDL</a></td></tr>
<tr class="memitem:gaa318cc9c1aa55acc5bb93f378ac7d8e4" id="r_gaa318cc9c1aa55acc5bb93f378ac7d8e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___d_m_a___tx.html#gaa318cc9c1aa55acc5bb93f378ac7d8e4">UART_DMA_TX_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gab1c3e8113617fb9c8fc63b3f3d7c8c65" id="r_gab1c3e8113617fb9c8fc63b3f3d7c8c65"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___d_m_a___tx.html#gab1c3e8113617fb9c8fc63b3f3d7c8c65">UART_DMA_TX_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5bb515d3814d448f84e2c98bf44f3993">USART_CR3_DMAT</a></td></tr>
<tr class="memitem:gac65987cb4d8fd5da0f7dc695312f6afa" id="r_gac65987cb4d8fd5da0f7dc695312f6afa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___d_m_a___rx.html#gac65987cb4d8fd5da0f7dc695312f6afa">UART_DMA_RX_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gab871994de6d36a02b8ec34af197dff1d" id="r_gab871994de6d36a02b8ec34af197dff1d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___d_m_a___rx.html#gab871994de6d36a02b8ec34af197dff1d">UART_DMA_RX_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaff130f15493c765353ec2fd605667c5a">USART_CR3_DMAR</a></td></tr>
<tr class="memitem:ga282d253c045fd9a3785c6c3e3293346c" id="r_ga282d253c045fd9a3785c6c3e3293346c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___half___duplex___selection.html#ga282d253c045fd9a3785c6c3e3293346c">UART_HALF_DUPLEX_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga61e92cc4435c05d850f9fd5456f391e6" id="r_ga61e92cc4435c05d850f9fd5456f391e6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___half___duplex___selection.html#ga61e92cc4435c05d850f9fd5456f391e6">UART_HALF_DUPLEX_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac71129810fab0b46d91161a39e3f8d01">USART_CR3_HDSEL</a></td></tr>
<tr class="memitem:ga2411ed44c5d82db84c5819e1e2b5b8b3" id="r_ga2411ed44c5d82db84c5819e1e2b5b8b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___wake_up___methods.html#ga2411ed44c5d82db84c5819e1e2b5b8b3">UART_WAKEUPMETHOD_IDLELINE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga4c6935f26f8f2a9fe70fd6306a9882cb" id="r_ga4c6935f26f8f2a9fe70fd6306a9882cb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___wake_up___methods.html#ga4c6935f26f8f2a9fe70fd6306a9882cb">UART_WAKEUPMETHOD_ADDRESSMARK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad831dfc169fcf14b7284984dbecf322d">USART_CR1_WAKE</a></td></tr>
<tr class="memitem:ga8cdce81a934ab7d0c2eecb4d85300d4e" id="r_ga8cdce81a934ab7d0c2eecb4d85300d4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___request___parameters.html#ga8cdce81a934ab7d0c2eecb4d85300d4e">UART_AUTOBAUD_REQUEST</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad261e1474dfb5329b5520e22790b026b">USART_RQR_ABRRQ</a></td></tr>
<tr class="memitem:ga52ced88a9f4ce90f3725901cf91f38b3" id="r_ga52ced88a9f4ce90f3725901cf91f38b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___request___parameters.html#ga52ced88a9f4ce90f3725901cf91f38b3">UART_SENDBREAK_REQUEST</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2d1a36c6b492c425b4e5cc94d983ecf1">USART_RQR_SBKRQ</a></td></tr>
<tr class="memitem:gadd5f511803928fd042f7fc6ef99f9cfb" id="r_gadd5f511803928fd042f7fc6ef99f9cfb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___request___parameters.html#gadd5f511803928fd042f7fc6ef99f9cfb">UART_MUTE_MODE_REQUEST</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2aae0f4fb0a74822ce212ea7d9b8463a">USART_RQR_MMRQ</a></td></tr>
<tr class="memitem:gaf2ee2d4b1bdcbc7772ddc0da89566936" id="r_gaf2ee2d4b1bdcbc7772ddc0da89566936"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___request___parameters.html#gaf2ee2d4b1bdcbc7772ddc0da89566936">UART_RXDATA_FLUSH_REQUEST</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7b148ee7c697bbcf836648063613612a">USART_RQR_RXFRQ</a></td></tr>
<tr class="memitem:gafecbd800f456ed666a42ac0842cd2c4b" id="r_gafecbd800f456ed666a42ac0842cd2c4b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___request___parameters.html#gafecbd800f456ed666a42ac0842cd2c4b">UART_TXDATA_FLUSH_REQUEST</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa40d2e52b5955b30c9399eb3dec769e8">USART_RQR_TXFRQ</a></td></tr>
<tr class="memitem:gab696b28f33174d038e0bfd300c1b2a77" id="r_gab696b28f33174d038e0bfd300c1b2a77"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#gab696b28f33174d038e0bfd300c1b2a77">UART_ADVFEATURE_NO_INIT</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga17c49d1895d43bfd6e0cf993103731ae" id="r_ga17c49d1895d43bfd6e0cf993103731ae"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#ga17c49d1895d43bfd6e0cf993103731ae">UART_ADVFEATURE_TXINVERT_INIT</a>&#160;&#160;&#160;0x00000001U</td></tr>
<tr class="memitem:gad5a4923f3e771d276c6a5332e3945e2a" id="r_gad5a4923f3e771d276c6a5332e3945e2a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#gad5a4923f3e771d276c6a5332e3945e2a">UART_ADVFEATURE_RXINVERT_INIT</a>&#160;&#160;&#160;0x00000002U</td></tr>
<tr class="memitem:ga3066937ab29631f78820865605e83628" id="r_ga3066937ab29631f78820865605e83628"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#ga3066937ab29631f78820865605e83628">UART_ADVFEATURE_DATAINVERT_INIT</a>&#160;&#160;&#160;0x00000004U</td></tr>
<tr class="memitem:ga56b48c24063e0f04b09f592c3ce7d2ac" id="r_ga56b48c24063e0f04b09f592c3ce7d2ac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#ga56b48c24063e0f04b09f592c3ce7d2ac">UART_ADVFEATURE_SWAP_INIT</a>&#160;&#160;&#160;0x00000008U</td></tr>
<tr class="memitem:ga053355b64de3105a19f3e5560f3557e4" id="r_ga053355b64de3105a19f3e5560f3557e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#ga053355b64de3105a19f3e5560f3557e4">UART_ADVFEATURE_RXOVERRUNDISABLE_INIT</a>&#160;&#160;&#160;0x00000010U</td></tr>
<tr class="memitem:gafd2fb1991911b82d75556eafe228ef90" id="r_gafd2fb1991911b82d75556eafe228ef90"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#gafd2fb1991911b82d75556eafe228ef90">UART_ADVFEATURE_DMADISABLEONERROR_INIT</a>&#160;&#160;&#160;0x00000020U</td></tr>
<tr class="memitem:ga09fdbb71292c899d6dc89a41e5752564" id="r_ga09fdbb71292c899d6dc89a41e5752564"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#ga09fdbb71292c899d6dc89a41e5752564">UART_ADVFEATURE_AUTOBAUDRATE_INIT</a>&#160;&#160;&#160;0x00000040U</td></tr>
<tr class="memitem:ga911654f44cd040f41871ec5af5ec1343" id="r_ga911654f44cd040f41871ec5af5ec1343"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___advanced___features___initialization___type.html#ga911654f44cd040f41871ec5af5ec1343">UART_ADVFEATURE_MSBFIRST_INIT</a>&#160;&#160;&#160;0x00000080U</td></tr>
<tr class="memitem:gaf2ef53664b0d4b93758575b9ee1b949b" id="r_gaf2ef53664b0d4b93758575b9ee1b949b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___tx___inv.html#gaf2ef53664b0d4b93758575b9ee1b949b">UART_ADVFEATURE_TXINV_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga1e0ddbed5fc5ddce5314f63e96e29c3d" id="r_ga1e0ddbed5fc5ddce5314f63e96e29c3d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___tx___inv.html#ga1e0ddbed5fc5ddce5314f63e96e29c3d">UART_ADVFEATURE_TXINV_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gadc2ad93cdc6d8f138f455a2fb671a211">USART_CR2_TXINV</a></td></tr>
<tr class="memitem:gae9598a2e4fec4b9166ad5eab24027870" id="r_gae9598a2e4fec4b9166ad5eab24027870"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___rx___inv.html#gae9598a2e4fec4b9166ad5eab24027870">UART_ADVFEATURE_RXINV_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gae12343bc2373080ae518ce7b536205cb" id="r_gae12343bc2373080ae518ce7b536205cb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___rx___inv.html#gae12343bc2373080ae518ce7b536205cb">UART_ADVFEATURE_RXINV_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gafff10115e1adb07c00f42627cedf01e5">USART_CR2_RXINV</a></td></tr>
<tr class="memitem:gab9aca2bdf257bd77e42213fdfdb884d3" id="r_gab9aca2bdf257bd77e42213fdfdb884d3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___data___inv.html#gab9aca2bdf257bd77e42213fdfdb884d3">UART_ADVFEATURE_DATAINV_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga090ecbcdc57b47144aefee8faf1eaf23" id="r_ga090ecbcdc57b47144aefee8faf1eaf23"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___data___inv.html#ga090ecbcdc57b47144aefee8faf1eaf23">UART_ADVFEATURE_DATAINV_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8f743bbd3df209bd1d434b17e08a78fe">USART_CR2_DATAINV</a></td></tr>
<tr class="memitem:gad1217ff59732b36d4ee9b50e7ed81ec4" id="r_gad1217ff59732b36d4ee9b50e7ed81ec4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___rx___tx___swap.html#gad1217ff59732b36d4ee9b50e7ed81ec4">UART_ADVFEATURE_SWAP_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga83138521e54eef41c75e9c37c2246eba" id="r_ga83138521e54eef41c75e9c37c2246eba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___rx___tx___swap.html#ga83138521e54eef41c75e9c37c2246eba">UART_ADVFEATURE_SWAP_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4aecba5721df1c1adb6d0264625accad">USART_CR2_SWAP</a></td></tr>
<tr class="memitem:gac467cc43fa4c3af4acb0fd161061c219" id="r_gac467cc43fa4c3af4acb0fd161061c219"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___overrun___disable.html#gac467cc43fa4c3af4acb0fd161061c219">UART_ADVFEATURE_OVERRUN_ENABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga19961cd52b746dac7a6860faad2ab40d" id="r_ga19961cd52b746dac7a6860faad2ab40d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___overrun___disable.html#ga19961cd52b746dac7a6860faad2ab40d">UART_ADVFEATURE_OVERRUN_DISABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga33d63c7953788124179cd18a8890a91a">USART_CR3_OVRDIS</a></td></tr>
<tr class="memitem:gaca66b20599569c6b7576f0600050bb61" id="r_gaca66b20599569c6b7576f0600050bb61"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___auto_baud_rate___enable.html#gaca66b20599569c6b7576f0600050bb61">UART_ADVFEATURE_AUTOBAUDRATE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gad4eee70c6d23721dd95c6a2465e10ca4" id="r_gad4eee70c6d23721dd95c6a2465e10ca4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___auto_baud_rate___enable.html#gad4eee70c6d23721dd95c6a2465e10ca4">UART_ADVFEATURE_AUTOBAUDRATE_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaaa290a89959d43fecf43f89d66123a0a">USART_CR2_ABREN</a></td></tr>
<tr class="memitem:ga14469fd73075e481184234019a7b6734" id="r_ga14469fd73075e481184234019a7b6734"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___d_m_a___disable__on___rx___error.html#ga14469fd73075e481184234019a7b6734">UART_ADVFEATURE_DMA_ENABLEONRXERROR</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gae838b9dfc0c2c082d5382973b369012b" id="r_gae838b9dfc0c2c082d5382973b369012b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___d_m_a___disable__on___rx___error.html#gae838b9dfc0c2c082d5382973b369012b">UART_ADVFEATURE_DMA_DISABLEONRXERROR</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae1f1b53b09336e82958755747853a753">USART_CR3_DDRE</a></td></tr>
<tr class="memitem:gae606b5f132b17af40d58c7d41fad35a5" id="r_gae606b5f132b17af40d58c7d41fad35a5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___m_s_b___first.html#gae606b5f132b17af40d58c7d41fad35a5">UART_ADVFEATURE_MSBFIRST_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gafb917e79562ccd13909c13056b34302f" id="r_gafb917e79562ccd13909c13056b34302f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___m_s_b___first.html#gafb917e79562ccd13909c13056b34302f">UART_ADVFEATURE_MSBFIRST_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga7342ab16574cebf157aa885a79986812">USART_CR2_MSBFIRST</a></td></tr>
<tr class="memitem:gab6c2929b1d4c2fe0319e412101b5dcc2" id="r_gab6c2929b1d4c2fe0319e412101b5dcc2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___stop___mode___enable.html#gab6c2929b1d4c2fe0319e412101b5dcc2">UART_ADVFEATURE_STOPMODE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gacc03fae31dda679f071909eeed2e5e22" id="r_gacc03fae31dda679f071909eeed2e5e22"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___stop___mode___enable.html#gacc03fae31dda679f071909eeed2e5e22">UART_ADVFEATURE_STOPMODE_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga1bf035f3a6674183945975fdda9e5d3a">USART_CR1_UESM</a></td></tr>
<tr class="memitem:ga11b6414641d82b941920c291e19aa042" id="r_ga11b6414641d82b941920c291e19aa042"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___mute___mode.html#ga11b6414641d82b941920c291e19aa042">UART_ADVFEATURE_MUTEMODE_DISABLE</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gaa9ca3763538abf310102ac34e81cdcbc" id="r_gaa9ca3763538abf310102ac34e81cdcbc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___mute___mode.html#gaa9ca3763538abf310102ac34e81cdcbc">UART_ADVFEATURE_MUTEMODE_ENABLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga4ae32b0c22f90fa8295d2ed96c2fd54d">USART_CR1_MME</a></td></tr>
<tr class="memitem:ga28e21d5a49aa9e9812b870697c554d97" id="r_ga28e21d5a49aa9e9812b870697c554d97"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___c_r2___a_d_d_r_e_s_s___l_s_b___p_o_s.html#ga28e21d5a49aa9e9812b870697c554d97">UART_CR2_ADDRESS_LSB_POS</a>&#160;&#160;&#160;24U</td></tr>
<tr class="memitem:ga926f94a665ed3d200e76aeb01f2ae275" id="r_ga926f94a665ed3d200e76aeb01f2ae275"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___wake_up__from___stop___selection.html#ga926f94a665ed3d200e76aeb01f2ae275">UART_WAKEUP_ON_ADDRESS</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:gade5095181db7434078e904af198c1699" id="r_gade5095181db7434078e904af198c1699"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___wake_up__from___stop___selection.html#gade5095181db7434078e904af198c1699">UART_WAKEUP_ON_STARTBIT</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3187bcba3c2e213f8a0523aa02837b32">USART_CR3_WUS_1</a></td></tr>
<tr class="memitem:ga77464f7eaba9f0a34876b1df36b8292e" id="r_ga77464f7eaba9f0a34876b1df36b8292e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___wake_up__from___stop___selection.html#ga77464f7eaba9f0a34876b1df36b8292e">UART_WAKEUP_ON_READDATA_NONEMPTY</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga76d102b464f15cbe18b0d83b61150293">USART_CR3_WUS</a></td></tr>
<tr class="memitem:ga0cff167e046507f91497853b772282c5" id="r_ga0cff167e046507f91497853b772282c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___driver_enable___polarity.html#ga0cff167e046507f91497853b772282c5">UART_DE_POLARITY_HIGH</a>&#160;&#160;&#160;0x00000000U</td></tr>
<tr class="memitem:ga92a5839b1b14f95ee4b8f4842a24f37b" id="r_ga92a5839b1b14f95ee4b8f4842a24f37b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___driver_enable___polarity.html#ga92a5839b1b14f95ee4b8f4842a24f37b">UART_DE_POLARITY_LOW</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga2000c42015289291da1c58fe27800d64">USART_CR3_DEP</a></td></tr>
<tr class="memitem:ga90d12dcdf8fd18f3be92d9699abe02cd" id="r_ga90d12dcdf8fd18f3be92d9699abe02cd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___c_r1___d_e_a_t___a_d_d_r_e_s_s___l_s_b___p_o_s.html#ga90d12dcdf8fd18f3be92d9699abe02cd">UART_CR1_DEAT_ADDRESS_LSB_POS</a>&#160;&#160;&#160;21U</td></tr>
<tr class="memitem:gaed41cd9ed039e3a075d0f4c433bea021" id="r_gaed41cd9ed039e3a075d0f4c433bea021"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___c_r1___d_e_d_t___a_d_d_r_e_s_s___l_s_b___p_o_s.html#gaed41cd9ed039e3a075d0f4c433bea021">UART_CR1_DEDT_ADDRESS_LSB_POS</a>&#160;&#160;&#160;16U</td></tr>
<tr class="memitem:ga869439269c26e8dee93d49b1c7e67448" id="r_ga869439269c26e8dee93d49b1c7e67448"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interruption___mask.html#ga869439269c26e8dee93d49b1c7e67448">UART_IT_MASK</a>&#160;&#160;&#160;0x001FU</td></tr>
<tr class="memitem:gaddb45b57fd556fb7cd763daa479f8ced" id="r_gaddb45b57fd556fb7cd763daa479f8ced"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___time_out___value.html#gaddb45b57fd556fb7cd763daa479f8ced">HAL_UART_TIMEOUT_VALUE</a>&#160;&#160;&#160;0x1FFFFFFU</td></tr>
<tr class="memitem:ga84a75a51675d1eb13d70e425efbe0d81" id="r_ga84a75a51675d1eb13d70e425efbe0d81"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga84a75a51675d1eb13d70e425efbe0d81">UART_FLAG_TXFT</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga19599526bda646dd6a990dad29458285">USART_ISR_TXFT</a></td></tr>
<tr class="memitem:ga4ae5692f6a720737fd3c4d8a11330ad0" id="r_ga4ae5692f6a720737fd3c4d8a11330ad0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga4ae5692f6a720737fd3c4d8a11330ad0">UART_FLAG_RXFT</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae7ab0ae314fb7a4b72f5cfa9ea870673">USART_ISR_RXFT</a></td></tr>
<tr class="memitem:gaf17b4d48c103bab82a7633911ebdeba0" id="r_gaf17b4d48c103bab82a7633911ebdeba0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#gaf17b4d48c103bab82a7633911ebdeba0">UART_FLAG_RXFF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaaaf5a3b29c38098274947c0b8782997f">USART_ISR_RXFF</a></td></tr>
<tr class="memitem:ga1b8dde82360cc90f7bb383911bf164ec" id="r_ga1b8dde82360cc90f7bb383911bf164ec"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga1b8dde82360cc90f7bb383911bf164ec">UART_FLAG_TXFE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf322143841cafcdbc2f46b0a99c8c7c5">USART_ISR_TXFE</a></td></tr>
<tr class="memitem:ga18f2d6a153838d8fd53911352a4d87ad" id="r_ga18f2d6a153838d8fd53911352a4d87ad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga18f2d6a153838d8fd53911352a4d87ad">UART_FLAG_REACK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa513c61dd111de0945d8dd0778e70ad5">USART_ISR_REACK</a></td></tr>
<tr class="memitem:gaf4a4ade6fd987ea7f22786269317f94a" id="r_gaf4a4ade6fd987ea7f22786269317f94a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#gaf4a4ade6fd987ea7f22786269317f94a">UART_FLAG_TEACK</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf1433ae77d20ec6da645117cde536f81">USART_ISR_TEACK</a></td></tr>
<tr class="memitem:gada80ee73404da204801766e42cbf7163" id="r_gada80ee73404da204801766e42cbf7163"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#gada80ee73404da204801766e42cbf7163">UART_FLAG_WUF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gad8ea420fd72b3f22e3ae5c22242c6b72">USART_ISR_WUF</a></td></tr>
<tr class="memitem:ga5d5f6f91093bfb222baa277a86f6b75b" id="r_ga5d5f6f91093bfb222baa277a86f6b75b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga5d5f6f91093bfb222baa277a86f6b75b">UART_FLAG_RWU</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0df19201dd47f3bd43954621c88ef4a3">USART_ISR_RWU</a></td></tr>
<tr class="memitem:gaea7a67e1f6a8af78e2adfaed59d1a4be" id="r_gaea7a67e1f6a8af78e2adfaed59d1a4be"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#gaea7a67e1f6a8af78e2adfaed59d1a4be">UART_FLAG_SBKF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga74aecf8406973a8fd5c02615d8a7b2d1">USART_ISR_SBKF</a></td></tr>
<tr class="memitem:ga01f2c67d8999a9ee8d91ac3cb5e7fbfe" id="r_ga01f2c67d8999a9ee8d91ac3cb5e7fbfe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga01f2c67d8999a9ee8d91ac3cb5e7fbfe">UART_FLAG_CMF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8199e4dab14311318c87b77ef758c2f9">USART_ISR_CMF</a></td></tr>
<tr class="memitem:ga2d1387d412382a345097acb403748ba3" id="r_ga2d1387d412382a345097acb403748ba3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga2d1387d412382a345097acb403748ba3">UART_FLAG_BUSY</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gafb7fb858e7f0dec99740570ecfb922cc">USART_ISR_BUSY</a></td></tr>
<tr class="memitem:ga9e309874f2c8f71e4049ae6cb702a2eb" id="r_ga9e309874f2c8f71e4049ae6cb702a2eb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga9e309874f2c8f71e4049ae6cb702a2eb">UART_FLAG_ABRF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gafbbfac6c1ba908d265572184b02daed2">USART_ISR_ABRF</a></td></tr>
<tr class="memitem:ga87853efaab808377c8acb9e8b671a2e8" id="r_ga87853efaab808377c8acb9e8b671a2e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga87853efaab808377c8acb9e8b671a2e8">UART_FLAG_ABRE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gae762a0bed3b7ecde26377eccd40d1e10">USART_ISR_ABRE</a></td></tr>
<tr class="memitem:ga69afec3b174a6b5969e71ea25d973958" id="r_ga69afec3b174a6b5969e71ea25d973958"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga69afec3b174a6b5969e71ea25d973958">UART_FLAG_RTOF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga09f8a368294fb6a5c47de1193484f3b8">USART_ISR_RTOF</a></td></tr>
<tr class="memitem:ga5435edd22ff23de7187654362c48e0b1" id="r_ga5435edd22ff23de7187654362c48e0b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga5435edd22ff23de7187654362c48e0b1">UART_FLAG_CTS</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga89131b07184422c83fda07ca20d4ce4c">USART_ISR_CTS</a></td></tr>
<tr class="memitem:ga0835e6f6bad597b368f03529ed3b96a4" id="r_ga0835e6f6bad597b368f03529ed3b96a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga0835e6f6bad597b368f03529ed3b96a4">UART_FLAG_CTSIF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9fb259765d41183dc3c5fd36831358d1">USART_ISR_CTSIF</a></td></tr>
<tr class="memitem:ga77b81c3c843b49af940862fe4d6ab933" id="r_ga77b81c3c843b49af940862fe4d6ab933"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga77b81c3c843b49af940862fe4d6ab933">UART_FLAG_LBDF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaf00a820cca1d3bb31f9f4f602f070c44">USART_ISR_LBDF</a></td></tr>
<tr class="memitem:gad39c017d415a7774c82eb07413a9dbe4" id="r_gad39c017d415a7774c82eb07413a9dbe4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#gad39c017d415a7774c82eb07413a9dbe4">UART_FLAG_TXE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga18793a28000fe6bf23a08265951eb3e5">USART_ISR_TXE_TXFNF</a></td></tr>
<tr class="memitem:ga5034eef38dce6da2fb2459c1598b1506" id="r_ga5034eef38dce6da2fb2459c1598b1506"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga5034eef38dce6da2fb2459c1598b1506">UART_FLAG_TXFNF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga18793a28000fe6bf23a08265951eb3e5">USART_ISR_TXE_TXFNF</a></td></tr>
<tr class="memitem:ga82e68a0ee4a8b987a47c66fc6f744894" id="r_ga82e68a0ee4a8b987a47c66fc6f744894"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga82e68a0ee4a8b987a47c66fc6f744894">UART_FLAG_TC</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa41e8667b30453a6b966aded9f5e8cbb">USART_ISR_TC</a></td></tr>
<tr class="memitem:ga9d1b2860d84a87abb05c3b2fed3c108c" id="r_ga9d1b2860d84a87abb05c3b2fed3c108c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga9d1b2860d84a87abb05c3b2fed3c108c">UART_FLAG_RXNE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabe52544cefa3642d3d1b3db7473bdbf2">USART_ISR_RXNE_RXFNE</a></td></tr>
<tr class="memitem:ga59facde9c848f4988b98fdd5f68376a4" id="r_ga59facde9c848f4988b98fdd5f68376a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga59facde9c848f4988b98fdd5f68376a4">UART_FLAG_RXFNE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gabe52544cefa3642d3d1b3db7473bdbf2">USART_ISR_RXNE_RXFNE</a></td></tr>
<tr class="memitem:ga5d7a320c505672f7508e3bd99f532a69" id="r_ga5d7a320c505672f7508e3bd99f532a69"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga5d7a320c505672f7508e3bd99f532a69">UART_FLAG_IDLE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacee745b19e0a6073280d234fdc96e627">USART_ISR_IDLE</a></td></tr>
<tr class="memitem:ga335a5b0f61512223bbc406b38c95b2d6" id="r_ga335a5b0f61512223bbc406b38c95b2d6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga335a5b0f61512223bbc406b38c95b2d6">UART_FLAG_ORE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9e5b4a08e3655bed8ec3022947cfc542">USART_ISR_ORE</a></td></tr>
<tr class="memitem:ga665981434d02ff5296361782c1a7d4b5" id="r_ga665981434d02ff5296361782c1a7d4b5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#ga665981434d02ff5296361782c1a7d4b5">UART_FLAG_NE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga09c7d19477a091689f50bd0ef5b6a3d8">USART_ISR_NE</a></td></tr>
<tr class="memitem:gafba4891ce21cf5223ca5fede0eac388d" id="r_gafba4891ce21cf5223ca5fede0eac388d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#gafba4891ce21cf5223ca5fede0eac388d">UART_FLAG_FE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga27cc4dfb6d5e817a69c80471b87deb4b">USART_ISR_FE</a></td></tr>
<tr class="memitem:gad5b96f73f6d3a0b58f07e2e9d7bf14d9" id="r_gad5b96f73f6d3a0b58f07e2e9d7bf14d9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___flags.html#gad5b96f73f6d3a0b58f07e2e9d7bf14d9">UART_FLAG_PE</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaa10e69d231b67d698ab59db3d338baa6">USART_ISR_PE</a></td></tr>
<tr class="memitem:ga55f922ddcf513509710ade5d7c40a1db" id="r_ga55f922ddcf513509710ade5d7c40a1db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga55f922ddcf513509710ade5d7c40a1db">UART_IT_PE</a>&#160;&#160;&#160;0x0028U</td></tr>
<tr class="memitem:ga552636e2af516d578856f5ee2ba71ed7" id="r_ga552636e2af516d578856f5ee2ba71ed7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga552636e2af516d578856f5ee2ba71ed7">UART_IT_TXE</a>&#160;&#160;&#160;0x0727U</td></tr>
<tr class="memitem:gac29e2c6f42357ed340c3b3c7d8385c58" id="r_gac29e2c6f42357ed340c3b3c7d8385c58"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#gac29e2c6f42357ed340c3b3c7d8385c58">UART_IT_TXFNF</a>&#160;&#160;&#160;0x0727U</td></tr>
<tr class="memitem:gab9a4dc4e8cea354fd60f4117513b2004" id="r_gab9a4dc4e8cea354fd60f4117513b2004"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#gab9a4dc4e8cea354fd60f4117513b2004">UART_IT_TC</a>&#160;&#160;&#160;0x0626U</td></tr>
<tr class="memitem:gac1bedf7a65eb8c3f3c4b52bdb24b139d" id="r_gac1bedf7a65eb8c3f3c4b52bdb24b139d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#gac1bedf7a65eb8c3f3c4b52bdb24b139d">UART_IT_RXNE</a>&#160;&#160;&#160;0x0525U</td></tr>
<tr class="memitem:ga6901e4b6c756ccef1da212c282bc501f" id="r_ga6901e4b6c756ccef1da212c282bc501f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga6901e4b6c756ccef1da212c282bc501f">UART_IT_RXFNE</a>&#160;&#160;&#160;0x0525U</td></tr>
<tr class="memitem:ga9781808d4f9999061fc2da36572191d9" id="r_ga9781808d4f9999061fc2da36572191d9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga9781808d4f9999061fc2da36572191d9">UART_IT_IDLE</a>&#160;&#160;&#160;0x0424U</td></tr>
<tr class="memitem:gabca5e77508dc2dd9aa26fcb683d9b988" id="r_gabca5e77508dc2dd9aa26fcb683d9b988"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#gabca5e77508dc2dd9aa26fcb683d9b988">UART_IT_LBD</a>&#160;&#160;&#160;0x0846U</td></tr>
<tr class="memitem:ga986d271478550f9afa918262ca642333" id="r_ga986d271478550f9afa918262ca642333"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga986d271478550f9afa918262ca642333">UART_IT_CTS</a>&#160;&#160;&#160;0x096AU</td></tr>
<tr class="memitem:ga4c22e866bce68975a180828012489106" id="r_ga4c22e866bce68975a180828012489106"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga4c22e866bce68975a180828012489106">UART_IT_CM</a>&#160;&#160;&#160;0x112EU</td></tr>
<tr class="memitem:gab8899f6307781779f65a7c18aabb3204" id="r_gab8899f6307781779f65a7c18aabb3204"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#gab8899f6307781779f65a7c18aabb3204">UART_IT_WUF</a>&#160;&#160;&#160;0x1476U</td></tr>
<tr class="memitem:ga2879c8d7ba77bb109462b3e526c3ea7d" id="r_ga2879c8d7ba77bb109462b3e526c3ea7d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga2879c8d7ba77bb109462b3e526c3ea7d">UART_IT_RXFF</a>&#160;&#160;&#160;0x183FU</td></tr>
<tr class="memitem:ga79e475ab3534a28f771701d97d2b81f3" id="r_ga79e475ab3534a28f771701d97d2b81f3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga79e475ab3534a28f771701d97d2b81f3">UART_IT_TXFE</a>&#160;&#160;&#160;0x173EU</td></tr>
<tr class="memitem:gaad4950a52a2f2a050760903ef6ebc015" id="r_gaad4950a52a2f2a050760903ef6ebc015"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#gaad4950a52a2f2a050760903ef6ebc015">UART_IT_RXFT</a>&#160;&#160;&#160;0x1A7CU</td></tr>
<tr class="memitem:gac5b949ef39bb1046947e2f2eff0670c1" id="r_gac5b949ef39bb1046947e2f2eff0670c1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#gac5b949ef39bb1046947e2f2eff0670c1">UART_IT_TXFT</a>&#160;&#160;&#160;0x1B77U</td></tr>
<tr class="memitem:gaa04d4eba7501b3a0a54d90fe40e626a0" id="r_gaa04d4eba7501b3a0a54d90fe40e626a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#gaa04d4eba7501b3a0a54d90fe40e626a0">UART_IT_RTO</a>&#160;&#160;&#160;0x0B3AU</td></tr>
<tr class="memitem:ga8eb26d8edd9bf78ae8d3ad87dd51b618" id="r_ga8eb26d8edd9bf78ae8d3ad87dd51b618"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga8eb26d8edd9bf78ae8d3ad87dd51b618">UART_IT_ERR</a>&#160;&#160;&#160;0x0060U</td></tr>
<tr class="memitem:ga333810cb588a739ad49042b9f564a6b2" id="r_ga333810cb588a739ad49042b9f564a6b2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga333810cb588a739ad49042b9f564a6b2">UART_IT_ORE</a>&#160;&#160;&#160;0x0300U</td></tr>
<tr class="memitem:ga35c77abdf7744b407d5ba751e546e965" id="r_ga35c77abdf7744b407d5ba751e546e965"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga35c77abdf7744b407d5ba751e546e965">UART_IT_NE</a>&#160;&#160;&#160;0x0200U</td></tr>
<tr class="memitem:ga98cbd9e918bcc56f329a803febaab468" id="r_ga98cbd9e918bcc56f329a803febaab468"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___interrupt__definition.html#ga98cbd9e918bcc56f329a803febaab468">UART_IT_FE</a>&#160;&#160;&#160;0x0100U</td></tr>
<tr class="memitem:ga9c2aef8048dd09ea5e72d69c63026f02" id="r_ga9c2aef8048dd09ea5e72d69c63026f02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga9c2aef8048dd09ea5e72d69c63026f02">UART_CLEAR_PEF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga404185136eb68f679e82e0187d66e411">USART_ICR_PECF</a></td></tr>
<tr class="memitem:ga2040edf7a1daa2e9f352364e285ef5c3" id="r_ga2040edf7a1daa2e9f352364e285ef5c3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga2040edf7a1daa2e9f352364e285ef5c3">UART_CLEAR_FEF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8400b4500c41800e5f18fc7291a64c9f">USART_ICR_FECF</a></td></tr>
<tr class="memitem:gad5b9aafb495296d917a5d85e63383396" id="r_gad5b9aafb495296d917a5d85e63383396"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#gad5b9aafb495296d917a5d85e63383396">UART_CLEAR_NEF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gac93fffe176d75c707e6bef9d15406331">USART_ICR_NECF</a></td></tr>
<tr class="memitem:ga3bc97b70293f9a7bf8cc21a74094afad" id="r_ga3bc97b70293f9a7bf8cc21a74094afad"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga3bc97b70293f9a7bf8cc21a74094afad">UART_CLEAR_OREF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga375f76b0670ffeb5d2691592d9e7c422">USART_ICR_ORECF</a></td></tr>
<tr class="memitem:ga75ee9be0ac2236931ef3d9514e7dedf4" id="r_ga75ee9be0ac2236931ef3d9514e7dedf4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga75ee9be0ac2236931ef3d9514e7dedf4">UART_CLEAR_IDLEF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga9d4d7675c0d36ce4347c3509d27c0760">USART_ICR_IDLECF</a></td></tr>
<tr class="memitem:ga1143cc2878693b1d5d56bf757e2b1bcb" id="r_ga1143cc2878693b1d5d56bf757e2b1bcb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga1143cc2878693b1d5d56bf757e2b1bcb">UART_CLEAR_TXFECF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga482ed578140c2eb9d647195dba6c0e9c">USART_ICR_TXFECF</a></td></tr>
<tr class="memitem:gadfbfe4df408d1d09ff2adc1ddad3de09" id="r_gadfbfe4df408d1d09ff2adc1ddad3de09"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#gadfbfe4df408d1d09ff2adc1ddad3de09">UART_CLEAR_TCF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gacf92ea54425a962dde662b10b61d0250">USART_ICR_TCCF</a></td></tr>
<tr class="memitem:ga030414d9a93ad994156210644634b73c" id="r_ga030414d9a93ad994156210644634b73c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga030414d9a93ad994156210644634b73c">UART_CLEAR_LBDF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#gaae7d1bc407d9e4168d7059043fe8e50f">USART_ICR_LBDCF</a></td></tr>
<tr class="memitem:gabe0f3bc774ad0b9319732da3be8374cf" id="r_gabe0f3bc774ad0b9319732da3be8374cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#gabe0f3bc774ad0b9319732da3be8374cf">UART_CLEAR_CTSF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga8a630d4a5e4ce10ad6fdb9da47126f4f">USART_ICR_CTSCF</a></td></tr>
<tr class="memitem:ga5815698abf54d69b752bd2c43c2d6ad3" id="r_ga5815698abf54d69b752bd2c43c2d6ad3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga5815698abf54d69b752bd2c43c2d6ad3">UART_CLEAR_CMF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga5478360c2639166c4d645b64cbf371be">USART_ICR_CMCF</a></td></tr>
<tr class="memitem:ga5081c579f9956a7712248430f3fe129b" id="r_ga5081c579f9956a7712248430f3fe129b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga5081c579f9956a7712248430f3fe129b">UART_CLEAR_WUF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga0526db5696016ae784e46b80027044fa">USART_ICR_WUCF</a></td></tr>
<tr class="memitem:ga2735a415d2c7930fdf2818943fd7ddd2" id="r_ga2735a415d2c7930fdf2818943fd7ddd2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___i_t___c_l_e_a_r___flags.html#ga2735a415d2c7930fdf2818943fd7ddd2">UART_CLEAR_RTOF</a>&#160;&#160;&#160;<a class="el" href="group___peripheral___registers___bits___definition.html#ga3d2a589246fecc7a05607c22ea7e7ee3">USART_ICR_RTOCF</a></td></tr>
<tr class="memitem:gae25ccd542b3d0e6180e38871da6070d2" id="r_gae25ccd542b3d0e6180e38871da6070d2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___reception___type___values.html#gae25ccd542b3d0e6180e38871da6070d2">HAL_UART_RECEPTION_STANDARD</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga0b12e95686ebebc1d6c8c77331e5bac6" id="r_ga0b12e95686ebebc1d6c8c77331e5bac6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___reception___type___values.html#ga0b12e95686ebebc1d6c8c77331e5bac6">HAL_UART_RECEPTION_TOIDLE</a>&#160;&#160;&#160;(0x00000001U)</td></tr>
<tr class="memitem:gac3e0c95a6f09176f7006ebeb80dfa98f" id="r_gac3e0c95a6f09176f7006ebeb80dfa98f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___reception___type___values.html#gac3e0c95a6f09176f7006ebeb80dfa98f">HAL_UART_RECEPTION_TORTO</a>&#160;&#160;&#160;(0x00000002U)</td></tr>
<tr class="memitem:ga51317a3f6e4743b13fa6f658599de6b8" id="r_ga51317a3f6e4743b13fa6f658599de6b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___reception___type___values.html#ga51317a3f6e4743b13fa6f658599de6b8">HAL_UART_RECEPTION_TOCHARMATCH</a>&#160;&#160;&#160;(0x00000003U)</td></tr>
<tr class="memitem:gacb1603ee7c4bcd848380033a2e6b3736" id="r_gacb1603ee7c4bcd848380033a2e6b3736"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___rx_event___type___values.html#gacb1603ee7c4bcd848380033a2e6b3736">HAL_UART_RXEVENT_TC</a>&#160;&#160;&#160;(0x00000000U)</td></tr>
<tr class="memitem:ga2c892e22044c836a9cc922859663562c" id="r_ga2c892e22044c836a9cc922859663562c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___rx_event___type___values.html#ga2c892e22044c836a9cc922859663562c">HAL_UART_RXEVENT_HT</a>&#160;&#160;&#160;(0x00000001U)</td></tr>
<tr class="memitem:ga3c0c16c839b49a4ad14cdcb479b3e8d0" id="r_ga3c0c16c839b49a4ad14cdcb479b3e8d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___rx_event___type___values.html#ga3c0c16c839b49a4ad14cdcb479b3e8d0">HAL_UART_RXEVENT_IDLE</a>&#160;&#160;&#160;(0x00000002U)</td></tr>
<tr class="memitem:ga19deab848407b106998416c78092fa9b" id="r_ga19deab848407b106998416c78092fa9b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga19deab848407b106998416c78092fa9b">__HAL_UART_RESET_HANDLE_STATE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga19deab848407b106998416c78092fa9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset UART handle states.  <br /></td></tr>
<tr class="memitem:gafc4f20cb0f29ba146c9bc14167c52744" id="r_gafc4f20cb0f29ba146c9bc14167c52744"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#gafc4f20cb0f29ba146c9bc14167c52744">__HAL_UART_FLUSH_DRREGISTER</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gafc4f20cb0f29ba146c9bc14167c52744"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flush the UART Data registers.  <br /></td></tr>
<tr class="memitem:ga9bd035161d41cde4f2568c7af06493bf" id="r_ga9bd035161d41cde4f2568c7af06493bf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga9bd035161d41cde4f2568c7af06493bf">__HAL_UART_CLEAR_FLAG</a>(__HANDLE__,  __FLAG__)</td></tr>
<tr class="memdesc:ga9bd035161d41cde4f2568c7af06493bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the specified UART pending flag.  <br /></td></tr>
<tr class="memitem:gaba5e19c60e0f37341b1585a380b84d49" id="r_gaba5e19c60e0f37341b1585a380b84d49"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#gaba5e19c60e0f37341b1585a380b84d49">__HAL_UART_CLEAR_PEFLAG</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gaba5e19c60e0f37341b1585a380b84d49"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the UART PE pending flag.  <br /></td></tr>
<tr class="memitem:gae1dfc7777b089a10464841045b524caa" id="r_gae1dfc7777b089a10464841045b524caa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#gae1dfc7777b089a10464841045b524caa">__HAL_UART_CLEAR_FEFLAG</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gae1dfc7777b089a10464841045b524caa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the UART FE pending flag.  <br /></td></tr>
<tr class="memitem:gaa1f69421585b3ada4d2b81d502a3ae6b" id="r_gaa1f69421585b3ada4d2b81d502a3ae6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#gaa1f69421585b3ada4d2b81d502a3ae6b">__HAL_UART_CLEAR_NEFLAG</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gaa1f69421585b3ada4d2b81d502a3ae6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the UART NE pending flag.  <br /></td></tr>
<tr class="memitem:ga9cdc2f2d55eaaa7895996bf6848df42e" id="r_ga9cdc2f2d55eaaa7895996bf6848df42e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga9cdc2f2d55eaaa7895996bf6848df42e">__HAL_UART_CLEAR_OREFLAG</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga9cdc2f2d55eaaa7895996bf6848df42e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the UART ORE pending flag.  <br /></td></tr>
<tr class="memitem:ga1345aa0af53d82269b13835c225e91d0" id="r_ga1345aa0af53d82269b13835c225e91d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga1345aa0af53d82269b13835c225e91d0">__HAL_UART_CLEAR_IDLEFLAG</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga1345aa0af53d82269b13835c225e91d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the UART IDLE pending flag.  <br /></td></tr>
<tr class="memitem:ga590d72bb6cccc36563d67697e53fe6cf" id="r_ga590d72bb6cccc36563d67697e53fe6cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga590d72bb6cccc36563d67697e53fe6cf">__HAL_UART_CLEAR_TXFECF</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga590d72bb6cccc36563d67697e53fe6cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the UART TX FIFO empty clear flag.  <br /></td></tr>
<tr class="memitem:ga261fe8a2afe84ec048113654266c5bf6" id="r_ga261fe8a2afe84ec048113654266c5bf6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga261fe8a2afe84ec048113654266c5bf6">__HAL_UART_GET_FLAG</a>(__HANDLE__,  __FLAG__)</td></tr>
<tr class="memdesc:ga261fe8a2afe84ec048113654266c5bf6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether the specified UART flag is set or not.  <br /></td></tr>
<tr class="memitem:gaba94165ed584d49c1ec12df9819bd4bb" id="r_gaba94165ed584d49c1ec12df9819bd4bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#gaba94165ed584d49c1ec12df9819bd4bb">__HAL_UART_ENABLE_IT</a>(__HANDLE__,  __INTERRUPT__)</td></tr>
<tr class="memdesc:gaba94165ed584d49c1ec12df9819bd4bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the specified UART interrupt.  <br /></td></tr>
<tr class="memitem:ga3c29b33f38658acbf592e9aaf84c6f33" id="r_ga3c29b33f38658acbf592e9aaf84c6f33"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga3c29b33f38658acbf592e9aaf84c6f33">__HAL_UART_DISABLE_IT</a>(__HANDLE__,  __INTERRUPT__)</td></tr>
<tr class="memdesc:ga3c29b33f38658acbf592e9aaf84c6f33"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the specified UART interrupt.  <br /></td></tr>
<tr class="memitem:ga89c4cb1b623c15cfdea2c0a864c8b1e4" id="r_ga89c4cb1b623c15cfdea2c0a864c8b1e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga89c4cb1b623c15cfdea2c0a864c8b1e4">__HAL_UART_GET_IT</a>(__HANDLE__,  __INTERRUPT__)</td></tr>
<tr class="memdesc:ga89c4cb1b623c15cfdea2c0a864c8b1e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether the specified UART interrupt has occurred or not.  <br /></td></tr>
<tr class="memitem:gab53dbf1d75f241330428bf426b2963d1" id="r_gab53dbf1d75f241330428bf426b2963d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#gab53dbf1d75f241330428bf426b2963d1">__HAL_UART_GET_IT_SOURCE</a>(__HANDLE__,  __INTERRUPT__)</td></tr>
<tr class="memdesc:gab53dbf1d75f241330428bf426b2963d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether the specified UART interrupt source is enabled or not.  <br /></td></tr>
<tr class="memitem:gaa81e0f2503bd2a699e7e478507946bb2" id="r_gaa81e0f2503bd2a699e7e478507946bb2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#gaa81e0f2503bd2a699e7e478507946bb2">__HAL_UART_CLEAR_IT</a>(__HANDLE__,  __IT_CLEAR__)</td></tr>
<tr class="memdesc:gaa81e0f2503bd2a699e7e478507946bb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the specified UART ISR flag, in setting the proper ICR register flag.  <br /></td></tr>
<tr class="memitem:ga568a15495a9e2a9d230474b9e8bcc8e4" id="r_ga568a15495a9e2a9d230474b9e8bcc8e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga568a15495a9e2a9d230474b9e8bcc8e4">__HAL_UART_SEND_REQ</a>(__HANDLE__,  __REQ__)</td></tr>
<tr class="memdesc:ga568a15495a9e2a9d230474b9e8bcc8e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set a specific UART request flag.  <br /></td></tr>
<tr class="memitem:ga3524747e5896296ab066d786431503ce" id="r_ga3524747e5896296ab066d786431503ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga3524747e5896296ab066d786431503ce">__HAL_UART_ONE_BIT_SAMPLE_ENABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga3524747e5896296ab066d786431503ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the UART one bit sample method.  <br /></td></tr>
<tr class="memitem:ga2dbd7e6592e8c5999f817b69f0fd24bb" id="r_ga2dbd7e6592e8c5999f817b69f0fd24bb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga2dbd7e6592e8c5999f817b69f0fd24bb">__HAL_UART_ONE_BIT_SAMPLE_DISABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga2dbd7e6592e8c5999f817b69f0fd24bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the UART one bit sample method.  <br /></td></tr>
<tr class="memitem:ga49eb5ea4996a957afeb8be2793ba3fe9" id="r_ga49eb5ea4996a957afeb8be2793ba3fe9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga49eb5ea4996a957afeb8be2793ba3fe9">__HAL_UART_ENABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga49eb5ea4996a957afeb8be2793ba3fe9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable UART.  <br /></td></tr>
<tr class="memitem:gad2f9fbdb4adf3a09939e201eaeea072f" id="r_gad2f9fbdb4adf3a09939e201eaeea072f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#gad2f9fbdb4adf3a09939e201eaeea072f">__HAL_UART_DISABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gad2f9fbdb4adf3a09939e201eaeea072f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable UART.  <br /></td></tr>
<tr class="memitem:ga4a77213945844bca4c22ba6a14b7ee4c" id="r_ga4a77213945844bca4c22ba6a14b7ee4c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga4a77213945844bca4c22ba6a14b7ee4c">__HAL_UART_HWCONTROL_CTS_ENABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga4a77213945844bca4c22ba6a14b7ee4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable CTS flow control.  <br /></td></tr>
<tr class="memitem:ga0a26cb3a576c2700f76a7c697c86a499" id="r_ga0a26cb3a576c2700f76a7c697c86a499"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga0a26cb3a576c2700f76a7c697c86a499">__HAL_UART_HWCONTROL_CTS_DISABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga0a26cb3a576c2700f76a7c697c86a499"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable CTS flow control.  <br /></td></tr>
<tr class="memitem:ga017ec9001ff33136f87cc4034b2709a6" id="r_ga017ec9001ff33136f87cc4034b2709a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga017ec9001ff33136f87cc4034b2709a6">__HAL_UART_HWCONTROL_RTS_ENABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga017ec9001ff33136f87cc4034b2709a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable RTS flow control.  <br /></td></tr>
<tr class="memitem:ga8c034e96ad8f263cafeb5898ff7311fd" id="r_ga8c034e96ad8f263cafeb5898ff7311fd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___macros.html#ga8c034e96ad8f263cafeb5898ff7311fd">__HAL_UART_HWCONTROL_RTS_DISABLE</a>(__HANDLE__)</td></tr>
<tr class="memdesc:ga8c034e96ad8f263cafeb5898ff7311fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable RTS flow control.  <br /></td></tr>
<tr class="memitem:ga3899c4107cac809b69d99f0efeb6a0b7" id="r_ga3899c4107cac809b69d99f0efeb6a0b7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga3899c4107cac809b69d99f0efeb6a0b7">UART_GET_DIV_FACTOR</a>(__CLOCKPRESCALER__)</td></tr>
<tr class="memdesc:ga3899c4107cac809b69d99f0efeb6a0b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get UART clock division factor from clock prescaler value.  <br /></td></tr>
<tr class="memitem:gacdbf9c41318d542f8fe3841d6981e89f" id="r_gacdbf9c41318d542f8fe3841d6981e89f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gacdbf9c41318d542f8fe3841d6981e89f">UART_DIV_LPUART</a>(__PCLK__,  __BAUD__,  __CLOCKPRESCALER__)</td></tr>
<tr class="memdesc:gacdbf9c41318d542f8fe3841d6981e89f"><td class="mdescLeft">&#160;</td><td class="mdescRight">BRR division operation to set BRR register with LPUART.  <br /></td></tr>
<tr class="memitem:gae18b02b9da2d07b28bfc070fec4225a4" id="r_gae18b02b9da2d07b28bfc070fec4225a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gae18b02b9da2d07b28bfc070fec4225a4">UART_DIV_SAMPLING8</a>(__PCLK__,  __BAUD__,  __CLOCKPRESCALER__)</td></tr>
<tr class="memdesc:gae18b02b9da2d07b28bfc070fec4225a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">BRR division operation to set BRR register in 8-bit oversampling mode.  <br /></td></tr>
<tr class="memitem:ga5321c542a31ad6a0dff145a71e55c1c2" id="r_ga5321c542a31ad6a0dff145a71e55c1c2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga5321c542a31ad6a0dff145a71e55c1c2">UART_DIV_SAMPLING16</a>(__PCLK__,  __BAUD__,  __CLOCKPRESCALER__)</td></tr>
<tr class="memdesc:ga5321c542a31ad6a0dff145a71e55c1c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">BRR division operation to set BRR register in 16-bit oversampling mode.  <br /></td></tr>
<tr class="memitem:gac0df0132f5d0ad91a86f2ee9489ba699" id="r_gac0df0132f5d0ad91a86f2ee9489ba699"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gac0df0132f5d0ad91a86f2ee9489ba699">UART_INSTANCE_LOWPOWER</a>(__HANDLE__)</td></tr>
<tr class="memdesc:gac0df0132f5d0ad91a86f2ee9489ba699"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether or not UART instance is Low Power UART.  <br /></td></tr>
<tr class="memitem:gaa8f50c3cc4c04875ea490fb81a08731d" id="r_gaa8f50c3cc4c04875ea490fb81a08731d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gaa8f50c3cc4c04875ea490fb81a08731d">IS_UART_BAUDRATE</a>(__BAUDRATE__)</td></tr>
<tr class="memdesc:gaa8f50c3cc4c04875ea490fb81a08731d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check UART Baud rate.  <br /></td></tr>
<tr class="memitem:ga8acf6b6648717b7192439f1b426321a4" id="r_ga8acf6b6648717b7192439f1b426321a4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga8acf6b6648717b7192439f1b426321a4">IS_UART_ASSERTIONTIME</a>(__TIME__)</td></tr>
<tr class="memdesc:ga8acf6b6648717b7192439f1b426321a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check UART assertion time.  <br /></td></tr>
<tr class="memitem:ga7e060b24713e3fb49f4f0f4fa71dd85f" id="r_ga7e060b24713e3fb49f4f0f4fa71dd85f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga7e060b24713e3fb49f4f0f4fa71dd85f">IS_UART_DEASSERTIONTIME</a>(__TIME__)</td></tr>
<tr class="memdesc:ga7e060b24713e3fb49f4f0f4fa71dd85f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check UART deassertion time.  <br /></td></tr>
<tr class="memitem:ga0fa4dec621a59f8c07f42548cdbb7f18" id="r_ga0fa4dec621a59f8c07f42548cdbb7f18"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga0fa4dec621a59f8c07f42548cdbb7f18">IS_UART_STOPBITS</a>(__STOPBITS__)</td></tr>
<tr class="memdesc:ga0fa4dec621a59f8c07f42548cdbb7f18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame number of stop bits is valid.  <br /></td></tr>
<tr class="memitem:ga165adc0070f15c78424d279cb1ea70fc" id="r_ga165adc0070f15c78424d279cb1ea70fc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga165adc0070f15c78424d279cb1ea70fc">IS_LPUART_STOPBITS</a>(__STOPBITS__)</td></tr>
<tr class="memdesc:ga165adc0070f15c78424d279cb1ea70fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that LPUART frame number of stop bits is valid.  <br /></td></tr>
<tr class="memitem:ga57b0798bfa43d210f492eb3c5e218a86" id="r_ga57b0798bfa43d210f492eb3c5e218a86"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga57b0798bfa43d210f492eb3c5e218a86">IS_UART_PARITY</a>(__PARITY__)</td></tr>
<tr class="memdesc:ga57b0798bfa43d210f492eb3c5e218a86"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame parity is valid.  <br /></td></tr>
<tr class="memitem:ga92977d9daf0c39d875df200ae0ae6acd" id="r_ga92977d9daf0c39d875df200ae0ae6acd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga92977d9daf0c39d875df200ae0ae6acd">IS_UART_HARDWARE_FLOW_CONTROL</a>(__CONTROL__)</td></tr>
<tr class="memdesc:ga92977d9daf0c39d875df200ae0ae6acd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART hardware flow control is valid.  <br /></td></tr>
<tr class="memitem:gae5b637b9191dea1f8fd3846b886dd38b" id="r_gae5b637b9191dea1f8fd3846b886dd38b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gae5b637b9191dea1f8fd3846b886dd38b">IS_UART_MODE</a>(__MODE__)</td></tr>
<tr class="memdesc:gae5b637b9191dea1f8fd3846b886dd38b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART communication mode is valid.  <br /></td></tr>
<tr class="memitem:ga754855879401ab846803a03eec2f7f10" id="r_ga754855879401ab846803a03eec2f7f10"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga754855879401ab846803a03eec2f7f10">IS_UART_STATE</a>(__STATE__)</td></tr>
<tr class="memdesc:ga754855879401ab846803a03eec2f7f10"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART state is valid.  <br /></td></tr>
<tr class="memitem:ga8d918253e015c4a8aa07316a89f8265e" id="r_ga8d918253e015c4a8aa07316a89f8265e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga8d918253e015c4a8aa07316a89f8265e">IS_UART_OVERSAMPLING</a>(__SAMPLING__)</td></tr>
<tr class="memdesc:ga8d918253e015c4a8aa07316a89f8265e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART oversampling is valid.  <br /></td></tr>
<tr class="memitem:ga6452a4420dac4abd4f0ea0e1677f37a9" id="r_ga6452a4420dac4abd4f0ea0e1677f37a9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga6452a4420dac4abd4f0ea0e1677f37a9">IS_UART_ONE_BIT_SAMPLE</a>(__ONEBIT__)</td></tr>
<tr class="memdesc:ga6452a4420dac4abd4f0ea0e1677f37a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame sampling is valid.  <br /></td></tr>
<tr class="memitem:ga88f07bdfe1fcdff17edbbba2f196110d" id="r_ga88f07bdfe1fcdff17edbbba2f196110d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga88f07bdfe1fcdff17edbbba2f196110d">IS_UART_ADVFEATURE_AUTOBAUDRATEMODE</a>(__MODE__)</td></tr>
<tr class="memdesc:ga88f07bdfe1fcdff17edbbba2f196110d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART auto Baud rate detection mode is valid.  <br /></td></tr>
<tr class="memitem:gaa2ad21da17caf46375c7bd4efbde8b17" id="r_gaa2ad21da17caf46375c7bd4efbde8b17"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gaa2ad21da17caf46375c7bd4efbde8b17">IS_UART_RECEIVER_TIMEOUT</a>(__TIMEOUT__)</td></tr>
<tr class="memdesc:gaa2ad21da17caf46375c7bd4efbde8b17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART receiver timeout setting is valid.  <br /></td></tr>
<tr class="memitem:gaee43ee42a5b1ba061322ab0763c6ef4f" id="r_gaee43ee42a5b1ba061322ab0763c6ef4f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gaee43ee42a5b1ba061322ab0763c6ef4f">IS_UART_RECEIVER_TIMEOUT_VALUE</a>(__TIMEOUTVALUE__)</td></tr>
<tr class="memdesc:gaee43ee42a5b1ba061322ab0763c6ef4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check the receiver timeout value.  <br /></td></tr>
<tr class="memitem:ga13d7f9876db68d9d6316204a8a2588de" id="r_ga13d7f9876db68d9d6316204a8a2588de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga13d7f9876db68d9d6316204a8a2588de">IS_UART_LIN</a>(__LIN__)</td></tr>
<tr class="memdesc:ga13d7f9876db68d9d6316204a8a2588de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART LIN state is valid.  <br /></td></tr>
<tr class="memitem:gac8ac0d0dc7fad5edf53150ce05d902ee" id="r_gac8ac0d0dc7fad5edf53150ce05d902ee"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gac8ac0d0dc7fad5edf53150ce05d902ee">IS_UART_LIN_BREAK_DETECT_LENGTH</a>(__LENGTH__)</td></tr>
<tr class="memdesc:gac8ac0d0dc7fad5edf53150ce05d902ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART LIN break detection length is valid.  <br /></td></tr>
<tr class="memitem:ga433107c59f6d1c66a38e53e38fdc0a57" id="r_ga433107c59f6d1c66a38e53e38fdc0a57"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga433107c59f6d1c66a38e53e38fdc0a57">IS_UART_DMA_TX</a>(__DMATX__)</td></tr>
<tr class="memdesc:ga433107c59f6d1c66a38e53e38fdc0a57"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART DMA TX state is valid.  <br /></td></tr>
<tr class="memitem:ga85c4c9339de2076106942cd9ab61ad77" id="r_ga85c4c9339de2076106942cd9ab61ad77"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga85c4c9339de2076106942cd9ab61ad77">IS_UART_DMA_RX</a>(__DMARX__)</td></tr>
<tr class="memdesc:ga85c4c9339de2076106942cd9ab61ad77"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART DMA RX state is valid.  <br /></td></tr>
<tr class="memitem:ga2298a324be00d275d98b336569ee3f97" id="r_ga2298a324be00d275d98b336569ee3f97"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga2298a324be00d275d98b336569ee3f97">IS_UART_HALF_DUPLEX</a>(__HDSEL__)</td></tr>
<tr class="memdesc:ga2298a324be00d275d98b336569ee3f97"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART half-duplex state is valid.  <br /></td></tr>
<tr class="memitem:ga144aecf3ad6ca3ce6653ae113c9a6141" id="r_ga144aecf3ad6ca3ce6653ae113c9a6141"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga144aecf3ad6ca3ce6653ae113c9a6141">IS_UART_WAKEUPMETHOD</a>(__WAKEUP__)</td></tr>
<tr class="memdesc:ga144aecf3ad6ca3ce6653ae113c9a6141"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART wake-up method is valid.  <br /></td></tr>
<tr class="memitem:ga5cf62c9c598753525888cc7c24be3cb2" id="r_ga5cf62c9c598753525888cc7c24be3cb2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga5cf62c9c598753525888cc7c24be3cb2">IS_UART_REQUEST_PARAMETER</a>(__PARAM__)</td></tr>
<tr class="memdesc:ga5cf62c9c598753525888cc7c24be3cb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART request parameter is valid.  <br /></td></tr>
<tr class="memitem:gad91bec43fbbaa25cec138ef8fcfbdad5" id="r_gad91bec43fbbaa25cec138ef8fcfbdad5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gad91bec43fbbaa25cec138ef8fcfbdad5">IS_UART_ADVFEATURE_INIT</a>(__INIT__)</td></tr>
<tr class="memdesc:gad91bec43fbbaa25cec138ef8fcfbdad5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART advanced features initialization is valid.  <br /></td></tr>
<tr class="memitem:ga4295a61b0afe152975609cedb9034fdc" id="r_ga4295a61b0afe152975609cedb9034fdc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga4295a61b0afe152975609cedb9034fdc">IS_UART_ADVFEATURE_TXINV</a>(__TXINV__)</td></tr>
<tr class="memdesc:ga4295a61b0afe152975609cedb9034fdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame TX inversion setting is valid.  <br /></td></tr>
<tr class="memitem:ga7f53ad0eca57b7ffabcae9007b7bbfa6" id="r_ga7f53ad0eca57b7ffabcae9007b7bbfa6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga7f53ad0eca57b7ffabcae9007b7bbfa6">IS_UART_ADVFEATURE_RXINV</a>(__RXINV__)</td></tr>
<tr class="memdesc:ga7f53ad0eca57b7ffabcae9007b7bbfa6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame RX inversion setting is valid.  <br /></td></tr>
<tr class="memitem:ga8f6cd85ae5ce7f8dd0ed9227ef5154f6" id="r_ga8f6cd85ae5ce7f8dd0ed9227ef5154f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga8f6cd85ae5ce7f8dd0ed9227ef5154f6">IS_UART_ADVFEATURE_DATAINV</a>(__DATAINV__)</td></tr>
<tr class="memdesc:ga8f6cd85ae5ce7f8dd0ed9227ef5154f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame data inversion setting is valid.  <br /></td></tr>
<tr class="memitem:gaf095ad39d3035f722c6976921a84dbea" id="r_gaf095ad39d3035f722c6976921a84dbea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gaf095ad39d3035f722c6976921a84dbea">IS_UART_ADVFEATURE_SWAP</a>(__SWAP__)</td></tr>
<tr class="memdesc:gaf095ad39d3035f722c6976921a84dbea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame RX/TX pins swap setting is valid.  <br /></td></tr>
<tr class="memitem:ga57b4229ecb4387a0bb9137fed8de13b8" id="r_ga57b4229ecb4387a0bb9137fed8de13b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga57b4229ecb4387a0bb9137fed8de13b8">IS_UART_OVERRUN</a>(__OVERRUN__)</td></tr>
<tr class="memdesc:ga57b4229ecb4387a0bb9137fed8de13b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame overrun setting is valid.  <br /></td></tr>
<tr class="memitem:ga7318c3e5c175b896444697a0a9407b2f" id="r_ga7318c3e5c175b896444697a0a9407b2f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga7318c3e5c175b896444697a0a9407b2f">IS_UART_ADVFEATURE_AUTOBAUDRATE</a>(__AUTOBAUDRATE__)</td></tr>
<tr class="memdesc:ga7318c3e5c175b896444697a0a9407b2f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART auto Baud rate state is valid.  <br /></td></tr>
<tr class="memitem:ga15b46dfa0d80a4583864a31da73e3c99" id="r_ga15b46dfa0d80a4583864a31da73e3c99"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga15b46dfa0d80a4583864a31da73e3c99">IS_UART_ADVFEATURE_DMAONRXERROR</a>(__DMA__)</td></tr>
<tr class="memdesc:ga15b46dfa0d80a4583864a31da73e3c99"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART DMA enabling or disabling on error setting is valid.  <br /></td></tr>
<tr class="memitem:ga82289de330949918b037acf94fb12aef" id="r_ga82289de330949918b037acf94fb12aef"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga82289de330949918b037acf94fb12aef">IS_UART_ADVFEATURE_MSBFIRST</a>(__MSBFIRST__)</td></tr>
<tr class="memdesc:ga82289de330949918b037acf94fb12aef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART frame MSB first setting is valid.  <br /></td></tr>
<tr class="memitem:gae0055233b6372a290fe69c811d307c5e" id="r_gae0055233b6372a290fe69c811d307c5e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gae0055233b6372a290fe69c811d307c5e">IS_UART_ADVFEATURE_STOPMODE</a>(__STOPMODE__)</td></tr>
<tr class="memdesc:gae0055233b6372a290fe69c811d307c5e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART stop mode state is valid.  <br /></td></tr>
<tr class="memitem:ga9df22e11f8bc82847fbe16b6f073ae04" id="r_ga9df22e11f8bc82847fbe16b6f073ae04"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga9df22e11f8bc82847fbe16b6f073ae04">IS_UART_MUTE_MODE</a>(__MUTE__)</td></tr>
<tr class="memdesc:ga9df22e11f8bc82847fbe16b6f073ae04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART mute mode state is valid.  <br /></td></tr>
<tr class="memitem:gaab6d7b59cffaf070ac3db100c76f4654" id="r_gaab6d7b59cffaf070ac3db100c76f4654"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gaab6d7b59cffaf070ac3db100c76f4654">IS_UART_WAKEUP_SELECTION</a>(__WAKE__)</td></tr>
<tr class="memdesc:gaab6d7b59cffaf070ac3db100c76f4654"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART wake-up selection is valid.  <br /></td></tr>
<tr class="memitem:gaecf169f01673ae67b12b3155e074bf12" id="r_gaecf169f01673ae67b12b3155e074bf12"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#gaecf169f01673ae67b12b3155e074bf12">IS_UART_DE_POLARITY</a>(__POLARITY__)</td></tr>
<tr class="memdesc:gaecf169f01673ae67b12b3155e074bf12"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART driver enable polarity is valid.  <br /></td></tr>
<tr class="memitem:ga9d8c59b67eaeb7e5f112e7c9123039ae" id="r_ga9d8c59b67eaeb7e5f112e7c9123039ae"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___private___macros.html#ga9d8c59b67eaeb7e5f112e7c9123039ae">IS_UART_PRESCALER</a>(__CLOCKPRESCALER__)</td></tr>
<tr class="memdesc:ga9d8c59b67eaeb7e5f112e7c9123039ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">Ensure that UART Prescaler is valid.  <br /></td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-typedef-members" class="groupheader"><a id="typedef-members" name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:ga94c58ae1f4dbcf6032224edfc93a6e19" id="r_ga94c58ae1f4dbcf6032224edfc93a6e19"><td class="memItemLeft" align="right" valign="top">typedef uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___types.html#ga94c58ae1f4dbcf6032224edfc93a6e19">HAL_UART_StateTypeDef</a></td></tr>
<tr class="memdesc:ga94c58ae1f4dbcf6032224edfc93a6e19"><td class="mdescLeft">&#160;</td><td class="mdescRight">HAL UART State definition.  <br /></td></tr>
<tr class="memitem:ga9f272475ea543a68fd8cb19f03a9bce9" id="r_ga9f272475ea543a68fd8cb19f03a9bce9"><td class="memItemLeft" align="right" valign="top">typedef uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___types.html#ga9f272475ea543a68fd8cb19f03a9bce9">HAL_UART_RxTypeTypeDef</a></td></tr>
<tr class="memdesc:ga9f272475ea543a68fd8cb19f03a9bce9"><td class="mdescLeft">&#160;</td><td class="mdescRight">HAL UART Reception type definition.  <br /></td></tr>
<tr class="memitem:gadddf3d5480235c945dc8eec58f961203" id="r_gadddf3d5480235c945dc8eec58f961203"><td class="memItemLeft" align="right" valign="top">typedef uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___types.html#gadddf3d5480235c945dc8eec58f961203">HAL_UART_RxEventTypeTypeDef</a></td></tr>
<tr class="memdesc:gadddf3d5480235c945dc8eec58f961203"><td class="mdescLeft">&#160;</td><td class="mdescRight">HAL UART Rx Event type definition.  <br /></td></tr>
<tr class="memitem:ga5de4a49eb132735325e706f406c69d6e" id="r_ga5de4a49eb132735325e706f406c69d6e"><td class="memItemLeft" align="right" valign="top">
typedef struct <a class="el" href="struct_____u_a_r_t___handle_type_def.html">__UART_HandleTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>UART_HandleTypeDef</b></td></tr>
<tr class="memdesc:ga5de4a49eb132735325e706f406c69d6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART handle Structure definition. <br /></td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-enum-members" class="groupheader"><a id="enum-members" name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:gad957348fe227e5cb75b70be026c5ae81" id="r_gad957348fe227e5cb75b70be026c5ae81"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___types.html#gad957348fe227e5cb75b70be026c5ae81">UART_ClockSourceTypeDef</a> { <br />
&#160;&#160;<a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81ad6525101a217833e23f5ca621d9f4a6f">UART_CLOCKSOURCE_D2PCLK1</a> = 0x00U
, <a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81a2331021d51e66dd84c836c660e18e832">UART_CLOCKSOURCE_D2PCLK2</a> = 0x01U
, <a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81a77165931619ab93f8024949aafd3902a">UART_CLOCKSOURCE_D3PCLK1</a> = 0x02U
, <a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81a350b9dd6358f8658ad02bbc6f74f8ea3">UART_CLOCKSOURCE_PLL2</a> = 0x04U
, <br />
&#160;&#160;<a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81a2305ac9ef420776f63058374de4292ff">UART_CLOCKSOURCE_PLL3</a> = 0x08U
, <a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81af4da147f3b62642e1ce6d2cb22aff32e">UART_CLOCKSOURCE_HSI</a> = 0x10U
, <a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81a7c7f0d608c372b61954bcb11b9cdc96c">UART_CLOCKSOURCE_CSI</a> = 0x20U
, <a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81ab9335bad77171144c2994f1554ce3901">UART_CLOCKSOURCE_LSE</a> = 0x40U
, <br />
&#160;&#160;<a class="el" href="group___u_a_r_t___exported___types.html#ggad957348fe227e5cb75b70be026c5ae81a9012cc24ac82c0d7aa7558f73d770eab">UART_CLOCKSOURCE_UNDEFINED</a> = 0x80U
<br />
 }</td></tr>
<tr class="memdesc:gad957348fe227e5cb75b70be026c5ae81"><td class="mdescLeft">&#160;</td><td class="mdescRight">UART clock sources definition.  <a href="group___u_a_r_t___exported___types.html#gad957348fe227e5cb75b70be026c5ae81">More...</a><br /></td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-func-members" class="groupheader"><a id="func-members" name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:gabe47045024787099b0bfa82bbe7b0b6a" id="r_gabe47045024787099b0bfa82bbe7b0b6a"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Init</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga927245827265eff1f3580a0121efd424" id="r_ga927245827265eff1f3580a0121efd424"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_HalfDuplex_Init</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga27e4497270bd06434e3965e4b06f5516" id="r_ga27e4497270bd06434e3965e4b06f5516"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_LIN_Init</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint32_t BreakDetectLength)</td></tr>
<tr class="memitem:gaae1b49f0cb62235141807d8cbc61bc4d" id="r_gaae1b49f0cb62235141807d8cbc61bc4d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_MultiProcessor_Init</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint8_t Address, uint32_t WakeUpMethod)</td></tr>
<tr class="memitem:ga8d98eaab25e61ae12e2e240c3388c57b" id="r_ga8d98eaab25e61ae12e2e240c3388c57b"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_DeInit</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga0e553b32211877322f949b14801bbfa7" id="r_ga0e553b32211877322f949b14801bbfa7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___functions___group1.html#ga0e553b32211877322f949b14801bbfa7">HAL_UART_MspInit</a> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga718f39804e3b910d738a0e1e46151188" id="r_ga718f39804e3b910d738a0e1e46151188"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___functions___group1.html#ga718f39804e3b910d738a0e1e46151188">HAL_UART_MspDeInit</a> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga01a7a7ac3cf0a262814ba44ee7580ddb" id="r_ga01a7a7ac3cf0a262814ba44ee7580ddb"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Transmit</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)</td></tr>
<tr class="memitem:gab868edc590e3b827a14528a25c999e2f" id="r_gab868edc590e3b827a14528a25c999e2f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Receive</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)</td></tr>
<tr class="memitem:ga695812b114bd1eb4d9afd6831143b01b" id="r_ga695812b114bd1eb4d9afd6831143b01b"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Transmit_IT</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, const uint8_t *pData, uint16_t Size)</td></tr>
<tr class="memitem:gadc0c3ef2109881d011601f0d41e70e40" id="r_gadc0c3ef2109881d011601f0d41e70e40"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Receive_IT</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint8_t *pData, uint16_t Size)</td></tr>
<tr class="memitem:ga821472e8c11e667d793b829a19c3e46c" id="r_ga821472e8c11e667d793b829a19c3e46c"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Transmit_DMA</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, const uint8_t *pData, uint16_t Size)</td></tr>
<tr class="memitem:gad674cce054e58927720cd689620ffa08" id="r_gad674cce054e58927720cd689620ffa08"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Receive_DMA</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint8_t *pData, uint16_t Size)</td></tr>
<tr class="memitem:ga8a713fd976d8ef02b818ea6ff0d4e41a" id="r_ga8a713fd976d8ef02b818ea6ff0d4e41a"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_DMAPause</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gaf2b3e6004d0200857781809baa16072d" id="r_gaf2b3e6004d0200857781809baa16072d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_DMAResume</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gab21aa06cfbaa1665b1062a803fcb4217" id="r_gab21aa06cfbaa1665b1062a803fcb4217"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_DMAStop</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga2d7be1f59fc810f49dadc580307a4862" id="r_ga2d7be1f59fc810f49dadc580307a4862"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Abort</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga5a8858ffca45541416097961523d5fb2" id="r_ga5a8858ffca45541416097961523d5fb2"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_AbortTransmit</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga9732372cfae60c019bb41554ab12edd6" id="r_ga9732372cfae60c019bb41554ab12edd6"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_AbortReceive</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga3183626ee21f103cbcb50241eca50e4d" id="r_ga3183626ee21f103cbcb50241eca50e4d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_Abort_IT</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga0fba12f56413e2dbe8b96040ecf5aa7e" id="r_ga0fba12f56413e2dbe8b96040ecf5aa7e"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_AbortTransmit_IT</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gaad7bc5748b849abc29d18b2ddd02876f" id="r_gaad7bc5748b849abc29d18b2ddd02876f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_AbortReceive_IT</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gaad01472c507ceee3c5f2274c775ff3bf" id="r_gaad01472c507ceee3c5f2274c775ff3bf"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_IRQHandler</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga49b287e7de94cd0a38d333629298f7c4" id="r_ga49b287e7de94cd0a38d333629298f7c4"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_TxHalfCpltCallback</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gabcdf9b59049eccbc87d54042f9235b1a" id="r_gabcdf9b59049eccbc87d54042f9235b1a"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_TxCpltCallback</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga1884970cc493d8efba5aec28c0d526e7" id="r_ga1884970cc493d8efba5aec28c0d526e7"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_RxHalfCpltCallback</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gae494a9643f29b87d6d81e5264e60e57b" id="r_gae494a9643f29b87d6d81e5264e60e57b"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_RxCpltCallback</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga0e0456ea96d55db31de947fb3e954f18" id="r_ga0e0456ea96d55db31de947fb3e954f18"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___functions___group2.html#ga0e0456ea96d55db31de947fb3e954f18">HAL_UART_ErrorCallback</a> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memdesc:ga0e0456ea96d55db31de947fb3e954f18"><td class="mdescLeft">&#160;</td><td class="mdescRight">当串口发送/接收出现错误时,会调用此函数,此时这个函数要做的就是重新启动接收  <br /></td></tr>
<tr class="memitem:gacdcb274a742093c45869f2cfbb0a8b09" id="r_gacdcb274a742093c45869f2cfbb0a8b09"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_AbortCpltCallback</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gacf94995fb9986930151f3c5586d37e5c" id="r_gacf94995fb9986930151f3c5586d37e5c"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_AbortTransmitCpltCallback</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga0f9d15c5ae7b69f09e0ee5f2461e7e7a" id="r_ga0f9d15c5ae7b69f09e0ee5f2461e7e7a"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_AbortReceiveCpltCallback</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga925534fb8bf7ca464fd05c982fe4bfa0" id="r_ga925534fb8bf7ca464fd05c982fe4bfa0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group___u_a_r_t___exported___functions___group2.html#ga925534fb8bf7ca464fd05c982fe4bfa0">HAL_UARTEx_RxEventCallback</a> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint16_t Size)</td></tr>
<tr class="memdesc:ga925534fb8bf7ca464fd05c982fe4bfa0"><td class="mdescLeft">&#160;</td><td class="mdescRight">每次dma/idle中断发生时，都会调用此函数.对于每个uart实例会调用对应的回调进行进一步的处理 例如:视觉协议解析/遥控器解析/裁判系统解析  <br /></td></tr>
<tr class="memitem:gad4f80d5b4401432af132dedff0604d62" id="r_gad4f80d5b4401432af132dedff0604d62"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_ReceiverTimeout_Config</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint32_t TimeoutValue)</td></tr>
<tr class="memitem:gacda9bbd9e186cc41cb9895ab71c4161d" id="r_gacda9bbd9e186cc41cb9895ab71c4161d"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_EnableReceiverTimeout</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga9ef6e546da136b62ae4365cb4142dde8" id="r_ga9ef6e546da136b62ae4365cb4142dde8"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_DisableReceiverTimeout</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gaffbf11fb4929f709004a11675cd25fcf" id="r_gaffbf11fb4929f709004a11675cd25fcf"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_LIN_SendBreak</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gad1e8ba15af5c8b25fd9eb31b9c85dfac" id="r_gad1e8ba15af5c8b25fd9eb31b9c85dfac"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_MultiProcessor_EnableMuteMode</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga60e23409c6c4039dd71a45e41c69654f" id="r_ga60e23409c6c4039dd71a45e41c69654f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_MultiProcessor_DisableMuteMode</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga62b7a4ce64c678a3a79d747fe3f50883" id="r_ga62b7a4ce64c678a3a79d747fe3f50883"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_MultiProcessor_EnterMuteMode</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga58d73e260a5536fb9cb40d7d2fe2b4bb" id="r_ga58d73e260a5536fb9cb40d7d2fe2b4bb"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_HalfDuplex_EnableTransmitter</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga396ebbcdbe352c3393ad3007614383ac" id="r_ga396ebbcdbe352c3393ad3007614383ac"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_HalfDuplex_EnableReceiver</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gad2799699d4d4b3c9d7fac0c3523fe45e" id="r_gad2799699d4d4b3c9d7fac0c3523fe45e"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="group___u_a_r_t___exported___types.html#ga94c58ae1f4dbcf6032224edfc93a6e19">HAL_UART_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_GetState</b> (const <a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga7297bf8c1679501a19c34f737c2eeea7" id="r_ga7297bf8c1679501a19c34f737c2eeea7"><td class="memItemLeft" align="right" valign="top">
uint32_t&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_UART_GetError</b> (const <a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga5a87d1b1c4284cae14f5a1402efaa11b" id="r_ga5a87d1b1c4284cae14f5a1402efaa11b"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>UART_SetConfig</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gad945067db34d4e1c3bd27a14fa8d7d25" id="r_gad945067db34d4e1c3bd27a14fa8d7d25"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>UART_CheckIdleState</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:gad377d340a4703ef434289d54794c281f" id="r_gad377d340a4703ef434289d54794c281f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>UART_WaitOnFlagUntilTimeout</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)</td></tr>
<tr class="memitem:gacd304011919c5ccd02544208c7aa451b" id="r_gacd304011919c5ccd02544208c7aa451b"><td class="memItemLeft" align="right" valign="top">
void&#160;</td><td class="memItemRight" valign="bottom"><b>UART_AdvFeatureConfig</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart)</td></tr>
<tr class="memitem:ga6629cec6016bd4dc0ea1bbce9e20898f" id="r_ga6629cec6016bd4dc0ea1bbce9e20898f"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>UART_Start_Receive_IT</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint8_t *pData, uint16_t Size)</td></tr>
<tr class="memitem:ga3821d988f1d6feb39dc86ab5010d0a9c" id="r_ga3821d988f1d6feb39dc86ab5010d0a9c"><td class="memItemLeft" align="right" valign="top">
<a class="el" href="stm32h7xx__hal__def_8h.html#a63c0679d1cb8b8c684fbb0632743478f">HAL_StatusTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><b>UART_Start_Receive_DMA</b> (<a class="el" href="group___u_a_r_t___exported___types.html#ga5de4a49eb132735325e706f406c69d6e">UART_HandleTypeDef</a> *huart, uint8_t *pData, uint16_t Size)</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-var-members" class="groupheader"><a id="var-members" name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:gac70d2aee3dafd85230030ff31ae8364e" id="r_gac70d2aee3dafd85230030ff31ae8364e"><td class="memItemLeft" align="right" valign="top">
const uint16_t&#160;</td><td class="memItemRight" valign="bottom"><b>UARTPrescTable</b> [12]</td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>Header file of UART HAL module. </p>
<dl class="section author"><dt>Author</dt><dd>MCD Application Team </dd></dl>
<dl class="section attention"><dt>Attention</dt><dd></dd></dl>
<p>Copyright (c) 2017 STMicroelectronics. All rights reserved.</p>
<p>This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-IS. </p>
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